PCB & Signal Integrity

Copper Clad Laminates

In selection of HF laminates and prepregs, their losses parameters, permittivity tolerance and dimensions are defining factors for successful design. For example, a choice of material with wide tolerances of permittivity and thickness could cause impedance mismatch of Transmission Lines or Waveguides. For the resonant structures, it leads to lowering their Q-factor and detuning effect. Materials with higher dielectric constant (Dk) values tend to radiate less than circuit materials with lower Dk values. 

Excessive temperatures can cause damage to dielectric material and delamination copper transmission lines from a substrate. In theory, most fraction of heat from sources will spread through the PCB’s dielectric and dissipate within the ground copper. However, PCB has a few other heat paths associated with integrated passive RF circuits, which thermal conductivity is higher than through dielectric.

For a multilayer RF PCB design, an unsymmetrical structure, especially with different laminates, could easily cause a PCB warping.  

Transitions, Vias & Signal Integrity 

In addition to layout and routing for low frequency boards, RF & Microwave PCB designer should consider solutions for RF power transfer efficiency, electric and magnetic field decoupling, conducted and radiated parasitic emissions, susceptibility and Signal Integrity as well. Tainted designs will carry timing problems, signal crosstalk, and electromagnetic-interference (EMI) problems. 

Unfortunately, any conductive traces discontinues and transitions (interconnections) between diverse transmission lines, wave-guides and vias types and structures are the most often overlooked elements of RF board designs. It relates to constraints imposed by PCB real estate limit and components placement density. At the same time, improper geometries of these elements cause excessive Insertion Loss, Return loss, changes of reactive parameters and, consequently, low product performance and signal integrity. 

Problems can begin right at RF port connecting external device through a connectorized coax cable. For example, if after coax connector a stripline transmission line (TL) follows, they both support TEM and quasi-TEM mode, and the transition is relatively simple with matched impedance. However, if the connector and the stripline have different ground layers, then PCB should have a transition segment to achieve impedance match. Otherwise, the high capacitance at the shift will cause energy reflection and a substantial loss. Additional critical aspect of transitions is the signal and ground current paths through. 

The second large group of issues is associated with through-holes and vias, which provide connections for leaded components, link PCB layers and sometimes work as heat spreaders – heat pipes.

Unlike conventional transmission lines, vias do not have ground planes supporting well-guided electromagnetic waves and thus are sources of impedance discontinuities

Other complications relate to “Land” patterns or islands. Besides impedance mismatch, they can work as antennas by picking up RF interfering signals and cause problems for the rest of the schematic.

Close proximity of signal traces to vias and pins connected to the power or ground planes creates electro-magnetic coupling between the trace’s edge and the pin. This effect increases the trace capacitance and lowers the inductance in the adjacent to the pin segment, thereby lowering the trace impedance in that region.

For a board with high pin density, it is important to select properly vias’ antipads. Antipads are punch-outs in the plane providing clearance between the conductive tube of via and a layer it crosses. Large antipads allows passing of signal traces over the punch-out in the plane, which cause a rise of parasitic inductance and capacitance reduction. Optimized via-holes and pads dimensions significantly improve the entire system performance. 

CAPABILITY:

·         High-Speed Signal Propagation and Interconnection of different transmission lines

·         Signal Integrity and EMC: minimum parasitic emission and crosstalk

·         Lead Free Solder: Temperature, Mechanics and Reliability

·         High Voltage Protection: Brake Down and ESD

·         Mounting Contacts & Connectors

·         Grounding and Shielding: Materials selection and Susceptibility issues

·         Transmission Lines: selection, design, and development

·         Layout, Vias & Micro-vias: Global directives

·         Soldering in Electronics Assembly

CHALLENGES & ISSUES

·         Long lengths of parallel run between signal traces in PCB

·         Lack of standardization in the PCB manufacturing industry

·         Incorrect calculations of integrated components for required impedance

·         Missing spacing calculations, stackup, not meeting voltage expectations

·         Creating impedance mismatch by simplified calculations for each layer

·         Missing tolerance analysis for Layer calculations and documentations on material values

·         Absence of constantly updated Database of available materials

·         Neglecting impedance coupons and incorrect selection of cross section for holes and vias